The University of Manchester
United Kingdom of Great Britain and Northern Ireland
James Garside
Work
University of Manchester
United Kingdom of Great Britain and Northern Ireland
→
Publications
A novel approach to data integrity auditing in PCS: Minimising any Trust on Third Parties (DIA-MTTP)
PLOS ONE
journal-article
An effective, secure and efficient tagging method for integrity protection of outsourced data in a public cloud storage
PLoS ONE
journal-article
spiNNlink: FPGA-Based Interconnect for the Million-Core SpiNNaker System
IEEE Access
journal-article
spiNNlink: FPGA-Based Interconnect for the Million-Core SpiNNaker System
IEEE Access
journal-article
Building SpiNNaker machines
SpiNNaker
book-chapter
The SpiNNaker chip
SpiNNaker
book-chapter
Analysis of Software and Hardware-Accelerated Approaches to the Simulation of Unconventional Interconnection Networks
Simulation Modelling Practice and Theory
journal-article
Creating the Future
SpiNNaker
book-chapter
Dynamic Power Management for Neuromorphic Many-Core Systems
IEEE Transactions on Circuits and Systems I: Regular Papers
journal-article
SpiNNaker 1M
software
Resource Elastic Virtualization for FPGAs using OpenCL
28th International Conference on Field Programmable Logic and Application (FPL)
conference-paper
Approximate Fixed-Point Elementary Function Accelerator for the SpiNNaker-2 Neuromorphic Chip
25th IEEE Symposium on Computer Arithmetic, 25/06/18
conference-presentation
Parallel distribution of an inner hair cell and auditory nerve model for real-time application
IEEE Transactions on Biomedical Circuits and Systems
journal-article
Parallel Distribution of an Inner Hair Cell and Auditory Nerve Model for Real-Time Application
IEEE Transactions on Biomedical Circuits and Systems
journal-article
Handling Physical-Layer Deadlock Caused by Permanent Faults in Quasi-Delay-Insensitive Networks-on-Chip
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
journal-article
Asynchronous Interface FIFO Design on FPGA for High-throughput NRZ Synchronisation
2017 27th International Conference on Field Programmable Logic and Applications (FPL)
conference-paper
Dynamic voltage and frequency scaling for neuromorphic many-core systems
2017 IEEE International Symposium on Circuits and Systems (ISCAS)
conference-paper
Live demonstration: Dynamic voltage and frequency scaling for neuromorphic many-core systems
IEEE International Symposium on Circuits and Systems, Baltimore, United States, 28/05/17
conference-poster
Parallel distribution of an inner hair cell and auditory nerve model for real-time application
IEEE Transactions on Biomedical Circuits and Systems
journal-article
Low Overhead Dynamic Binary Translation on ARM
Proceedings of the 38th ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI 2017
conference-paper
HyperMAMBO-X64: Using Virtualization to Support High-performance Transparent Binary Translation
Proceedings of the 13th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments
conference-paper
Parallel Hardware Merge Sorter
Proceedings - 24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016
conference-paper
Analysis of FPGA and software approaches to simulate unconventional computer architectures
2015 International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015
conference-paper
Automatic clock: A promising approach toward GALSification
Proceedings - International Symposium on Asynchronous Circuits and Systems
conference-paper
Automatic clock
22nd IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2016
conference-paper
DReAM: Dynamic re-arrangement of address mapping to improve the performance of DRAMs
ACM International Conference Proceeding Series
conference-paper
DReAM
MEMSYS 2016 - Proceedings of the International Symposium on Memory Systems, 03-06-October-2016
conference-paper
HAPPY: Hybrid address-based page policy in DRAMs
ACM International Conference Proceeding Series
conference-paper
HAPPY
MEMSYS 2016 - Proceedings of the International Symposium on Memory Systems
conference-paper
On-chip order-exploiting routing table minimization for a multicast supercomputer network
IEEE International Conference on High Performance Switching and Routing, HPSR
conference-paper
On-chip order-exploiting routing table minimization for a multicast supercomputer network
IEEE 17th International Conference on High Performance Switching and Routing, HPSR 2016
conference-paper
Optimizing indirect branches in dynamic binary translators
ACM Transactions on Architecture and Code Optimization
journal-article
Optimizing Indirect Branches in Dynamic Binary Translators
ACM Transactions on Architecture and Code Optimization
journal-article
Parallel Hardware Merge Sorter
24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016
conference-paper
Deadlock recovery in asynchronous networks on chip in the presence of transient faults
Proceedings - International Symposium on Asynchronous Circuits and Systems
conference-paper
Analysis of FPGA and software approaches to simulate unconventional computer architectures
Proceedigns of the 2015 International Conference on ReConFigurable Computing and FPGAs
conference-paper
Accelerating interconnect analysis using high-level HDLs and FPGA, SpiNNaker as a case study
Proceedings - 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2015
conference-paper
Accelerating Interconnect Analysis Using High-Level HDLs and FPGA, SpiNNaker as a Case Study
Field-Programmable Custom Computing Machines (FCCM), 2015 IEEE 23rd Annual International Symposium on
conference-paper
De-elastisation: From asynchronous dataflows to synchronous circuits
Proceedings -Design, Automation and Test in Europe, DATE
conference-paper
De-elastisation: From asynchronous dataflows to synchronous circuits
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015
conference-paper
Deadlock Recovery in Asynchronous Networks on Chip in the Presence of Transient Faults
Asynchronous Circuits and Systems (ASYNC), 2015 21st IEEE International Symposium
conference-paper
Network traffic exploration on a many-core computing platform: SpiNNaker real-time traffic visualiser
2015 11th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2015
conference-paper
Network traffic exploration on a many-core computing platform
2015 11th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2015
conference-paper
Project Beehive:
host publication
conference-paper
Project Beehive: A Hardware/Software Co-designed Stack for Runtime and Architectural Research
CoRR
journal-article
SpiNNaker - Programming model
IEEE Transactions on Computers
journal-article
SpiNNaker - programming model
I E E E Transactions on Computers
journal-article
An asynchronous SDM network-on-chip tolerating permanent faults
Proceedings - International Symposium on Asynchronous Circuits and Systems
conference-paper
An Asynchronous SDM Network-on-Chip Tolerating Permanent Faults,
Asynchronous Circuits and Systems (ASYNC), 2014 20th IEEE International Symposium on
conference-paper
Automatic data path extraction in large-scale register-transfer level designs
Proceedings - IEEE International Symposium on Circuits and Systems
conference-paper
Automatic data path extraction in large-scale register-transfer level designs
Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
conference-paper
On-line detection of the deadlocks caused by permanently faulty links in quasi-delay insensitive networks on chip
Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
conference-paper
On-line Detection of the Deadlocks Caused by Permanently Faulty Links in Quasi-delay Insensitive Networks on Chip
Proceedings of the 24th Edition of the Great Lakes Symposium on VLSI
conference-paper
Optimised synthesis of asynchronous elastic dataflows by leveraging clocked EDA
Proceedings - 2014 17th Euromicro Conference on Digital System Design, DSD 2014
conference-paper
Optimised Synthesis of Asynchronous Elastic Dataflows by Leveraging Clocked EDA
Digital System Design (DSD), 2014 17th Euromicro Conference on
conference-paper
Protecting QDI interconnects from transient faults using delay-insensitive redundant check codes
Microprocessors and Microsystems
journal-article
Protecting QDI interconnects from transient faults using delay-insensitive redundant check codes
Microprocessors and Microsystems
journal-article
Protecting QDI interconnects from transient faults using delay-insensitive redundant check codes
Microprocessors and Microsystems
conference-paper
eTeak: A Data-driven Synchronous Elastic Synthesiser
host publication
conference-paper
Automatic controller detection for large scale RTL designs
Proceedings - 16th Euromicro Conference on Digital System Design, DSD 2013
conference-paper
Automatic controller detection for large scale RTL designs
Proceedings - 16th Euromicro Conference on Digital System Design, DSD 2013|Proc. - Euromicro Conf. Digit. Syst. Des., DSD
conference-paper
Overview of the SpiNNaker system architecture
IEEE Transactions on Computers
journal-article
Overview of the SpiNNaker system architecture
IEEE Transactions on Computers
journal-article
SpiNNaker: A 1-W 18-core system-on-chip for massively-parallel neural network simulation
IEEE Journal of Solid-State Circuits
journal-article
SpiNNaker: A 1-W 18-core system-on-chip for massively-parallel neural network simulation
IEEE Journal of Solid State Circuits
journal-article
SpiNNaker: Fault tolerance in a power- and area- Constrained large-Scale neuromimetic architecture
Parallel Computing
journal-article
SpiNNaker: Fault tolerance in a power- and area- Constrained large-Scale neuromimetic architecture
Parallel Computing
journal-article
Transient fault tolerant QDI interconnects using redundant check code
Proceedings - 16th Euromicro Conference on Digital System Design, DSD 2013
conference-paper
Transient fault tolerant QDI interconnects using redundant check code
Proceedings - 16th Euromicro Conference on Digital System Design, DSD 2013|Proc. - Euromicro Conf. Digit. Syst. Des., DSD
conference-paper
An asynchronous fully digital delay locked loop for DDR SDRAM data recovery
Proceedings - International Symposium on Asynchronous Circuits and Systems
conference-paper
An asynchronous fully digital delay locked loop for DDR SDRAM data recovery
Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.
conference-paper
Area efficient asynchronous SDM routers using 2-stage Clos switches
Proceedings -Design, Automation and Test in Europe, DATE
conference-paper
Area efficient asynchronous SDM routers using 2-stage Clos switches
Proceedings -Design, Automation and Test in Europe, DATE|Proc. Des. Autom. Test Eur. DATE
conference-paper
Boosting single thread performance in mobile processors via reconfigurable acceleration
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
book
Boosting single thread performance in mobile processors via reconfigurable acceleration
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|Lect. Notes Comput. Sci.
conference-paper
Scalable communications for a million-core neural processing architecture
Journal of Parallel and Distributed Computing
journal-article
Scalable communications for a million-core neural processing architecture
Journal of Parallel and Distributed Computing
journal-article
SpiNNaker: A multi-core system-on-chip for massively-parallel neural net simulation
Proceedings of the Custom Integrated Circuits Conference
conference-paper
SpiNNaker: A multi-core system-on-chip for massively-parallel neural net simulation
Proceedings of the Custom Integrated Circuits Conference|Proc Custom Integr Circuits Conf
conference-paper
SpiNNaker: Design and implementation of a GALS multicore system-on-chip
ACM Journal on Emerging Technologies in Computing Systems
journal-article
SpiNNaker: Design and implementation of a GALS multicore system-on-chip
ACM Journal on Emerging Technologies in Computing Systems
journal-article
The amulet chips: Architectural development for asynchronous microprocessors
2009 16th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2009|IEEE Int. Conf. Electron., Circuits Syst., ICECS
conference-paper
A programmable adaptive router for a GALS parallel system
Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.
conference-paper
Fault tolerant delay insensitive inter-chip communication
Proceedings - International Symposium on Asynchronous Circuits and Systems
conference-paper
A programmable adaptive router for a GALS parallel system
Proceedings - International Symposium on Asynchronous Circuits and Systems
conference-paper
Fault tolerant delay insensitive inter-chip communication
Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.
conference-paper
The amulet chips: Architectural development for asynchronous microprocessors
2009 16th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2009
conference-paper
An adaptive bloom filter cache partitioning scheme for multicore architectures
Proceedings - 2008 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2008
conference-paper
Temporal Adaptation -- asynchronicity in processor design
Adaptive Techniques for Dynamic Processor Optimization Adaptive Techniques for Dynamic Processor Optimization Theory and Practice
book-chapter
Sensitive registers: A technique for reducing the fetch bandwidth in low-power microprocessors
Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
conference-paper
Asynchronous and self-timed processor design
Processor Design: System-on-Chip Computing for ASICs and FPGAs
book
Asynchronous and self-timed processor design
Processor Design: System-on-Chip Computing for ASICs and FPGAs|Proc. Des.: System-on-Chip Comp. for ASICs and FPGAs
book-chapter
Sensitive registers: A technique for reducing the fetch bandwidth in low-power microprocessors
Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI|Proc. ACM Great Lakes Symp. VLSI GLSVLSI
conference-paper
Modernization of teaching in embedded systems design - An international collaborative project
IEEE Transactions on Education
journal-article
Modernization of teaching in embedded systems design - An international collaborative project
IEEE Transactions on Education
journal-article
A low-power processor architecture optimized for wireless devices
Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors|Proc Int Conf Appl Spec Syst Arcitec Process Proc
conference-paper
A Quasi-delay-insensitive method to overcome transistor variation
Proceedings of the IEEE International Conference on VLSI Design
conference-paper
A Quasi-delay-insensitive method to overcome transistor variation
Proceedings of the IEEE International Conference on VLSI Design|Proc IEEE Int Conf VLSI Des
conference-paper
A low-power processor architecture optimized for wireless devices
Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors
conference-paper
Teaching embedded systems design - An international collaborative project
Proceedings - Frontiers in Education Conference, FIE
conference-paper
A CAM With Mixed Serial-Parallel Comparison for Use in Low Energy Caches
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
journal-article
A CAM With Mixed Serial-Parallel Comparison for Use in Low Energy Caches
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
journal-article
An asynchronous, iterative implementation of the original booth multiplication algorithm
Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems
journal-article
SPA - A secure Amulet core for smartcard applications
Microprocessors and Microsystems
journal-article
Early Output Logic using Anti-Tokens
Proceedings International Workshop on Logic Synthesis
conference-paper
A microcomputer interfacing laboratory
International Journal of Electrical Engineering Education
journal-article
Adaptive pipeline structures for speculation control
Proceedings - International Symposium on Asynchronous Circuits and Systems
conference-paper
Adaptive pipeline structures for speculation control
Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.
conference-paper
An asynchronous copy-back cache architecture
Microprocessors and Microsystems
journal-article
An asynchronous copy-back cache architecture
Microprocessors and Microsystems
journal-article
Designing robust asynchronous circuit components
IEE Proceedings: Circuits, Devices and Systems
journal-article
Designing robust asynchronous circuit components
IEE Proceedings: Circuits, Devices and Systems
journal-article
SPA - A secure Amulet core for smartcard applications
Microprocessors and Microsystems
journal-article
Logic Design of Asynchronous Circuits (Tutorial Abstract)
VLSI Design
conference-paper
Adaptive pipeline depth control for processor power-management
Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
conference-paper
Adaptive pipeline depth control for processor power-management
Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors|Proc IEEE Int Conf Comput Des VLSI Comput Process
conference-paper
An adaptive serial-parallel CAM architecture for low-power cache blocks
Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers
conference-paper
An adaptive serial-parallel CAM architecture for low-power cache blocks
Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers|Proc Int Symp Low Power Electron Des Dig Tech Papers
conference-paper
An asynchronous victim cache
Proceedings - Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, DSD 2002
conference-paper
An Asynchronous Victim Cache
Proceedings Euromicro Symposium on Digital System Design
conference-paper
SPA - A synthesisable amulet core for smartcard applications
Proceedings - International Symposium on Asynchronous Circuits and Systems
conference-paper
SPA - A synthesisable amulet core for smartcard applications
Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.
conference-paper
Power management in the amulet microprocessors
IEEE Design and Test of Computers
journal-article
Processors
Principles of Asynchronous Circuit Design - A Systems Perspective
book-chapter
A practical comparison of asynchronous design styles
Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.
conference-paper
AMULET3i cache architecture
Proceedings - International Symposium on Asynchronous Circuits and Systems
conference-paper
A practical comparison of asynchronous design styles
Proceedings - International Symposium on Asynchronous Circuits and Systems
conference-paper
AMULET3i cache architecture
Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.
conference-paper
Power management in the amulet microprocessors
IEEE Design and Test of Computers
journal-article
AMULET3: A 100 MIPS asynchronous embedded processor
Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors|Proc IEEE Int Conf Comput Des VLSI Comput Process
conference-paper
AMULET3i - An asynchronous system-on-chip
Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.
conference-paper
AMULET3: A 100 MIPS asynchronous embedded processor
Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
conference-paper
AMULET3i - An asynchronous system-on-chip
Proceedings - International Symposium on Asynchronous Circuits and Systems
conference-paper
AMULET2e
Institute of Electrical and Electronics Engineers. Proceedings
journal-article
AMULET3 revealed
Proceedings - International Symposium on Asynchronous Circuits and Systems
conference-paper
AMULET2e: An asynchronous embedded controller
Proceedings of the IEEE
journal-article
AMULET3 revealed
Proceedings - International Symposium on Asynchronous Circuits and Systems
conference-paper
Memory faults in asynchronous microprocessors
Proceedings - International Symposium on Asynchronous Circuits and Systems
conference-paper
Memory faults in asynchronous microprocessors
Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.
conference-paper
Reconfigurable latch controllers for low power asynchronous circuits
Proceedings - International Symposium on Asynchronous Circuits and Systems
conference-paper
Reconfigurable latch controllers for low power asynchronous circuits
Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.
conference-paper
AMULET3: a high-performance self-timed ARM microprocessor
Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
conference-paper
AMULET3
Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
conference-paper
Asynchronous embedded control
Integrated Computer-Aided Engineering
journal-article
Asynchronous embedded control
Integrated Computer-Aided Engineering
journal-article
AMULET 1: An asynchronous ARM microprocessor
IEEE Transactions on Computers
journal-article
AMULET 1
IEEE Transactions on Computers
journal-article
AMULET1: A Asynchronous ARM Microprocessor
IEEE Trans. Computers
journal-article
AMULET2e: An asynchronous embedded controller
Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems
conference-paper
AMULET2e: An asynchronous embedded controller
Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems|Proc Int Symp Adv Res Asynchr Circuits Syst
conference-paper
Result forwarding mechanism for asynchronous pipelined systems
Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems
conference-paper
A Result Forwarding Mechanism for Asynchronous Pipelined Systems
ASYNC
conference-paper
AMULET1: A Micropipelined ARM
COMPCON
conference-paper
Design and evaluation of an asynchronous microprocessor
Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
conference-paper
The Design and Evaluation of an Asynchronous Microprocessor
ICCD
conference-paper
Micropipelined ARM
IFIP Transactions A: Computer Science and Technology
book
Micropipelined ARM
book
A CMOS VLSI Implementation of an Asynchronous ALU
Asynchronous Design Methodologies
conference-paper
A micropipelined ARM
VLSI
conference-paper